Hardware software co-simulation of the multiple image encryption technique using the xilinx system generator

Panduranga, H. T. and Naveen Kumar, S. K. and Sharath Kumar, H. S. (2013) Hardware software co-simulation of the multiple image encryption technique using the xilinx system generator. Journal of Information Processing Systems, 9 (3). p. 499. ISSN 2092-805X

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Official URL: http://doi.org/10.3745/JIPS.2013.9.3.499

Abstract

Hardware-Software co-simulation of a multiple image encryption technique shall be described in this paper. Our proposed multiple image encryption technique is based on the Latin Square Image Cipher (LSIC). First, a carrier image that is based on the Latin Square is generated by using 256-bits of length key. The XOR operation is applied between an input image and the Latin Square Image to generate an encrypted image. Then, the XOR operation is applied between the encrypted image and the second input image to encrypt the second image. This process is continues until the nth input image is encrypted. We achieved hardware co-simulation of the proposed multiple image encryption technique by using the Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. We validated our proposed technique by using the hardware software co-simulation method.

Item Type: Article
Uncontrolled Keywords: Computer software, Cryptography, Encryption technique, Hardware, Hardware Co simulations, Hardware-software co-simulation, Image encryptions, Image processing, Latin square, Multiple-image encryptions, Xilinx system generator, Xilinx system generators (XSG)
Subjects: D Physical Science > Electronic
Divisions: PG Centre Hassan > Electronics
Depositing User: Arshiya Kousar Library Assistant
Date Deposited: 23 Oct 2019 06:55
Last Modified: 23 Oct 2019 06:55
URI: http://eprints.uni-mysore.ac.in/id/eprint/9093

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